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High Speed Digital Signals on Breadboard. Theory.
Posted by NorthGuy on Saturday, February 9, 2019 05:12 PM
Solderless breadboard is the fastest way to assemble simple circuits for testing and prototyping purposes. However, it is often considered unsuitable for high speed circuits. For example, Wikipedia[8] states that breadboards cannot be used with signals above 10 MHz.
Fig. 1. Solderless breadboard
On the other hand, you can often see projects where much faster signals are used on breadboards successfully. Brandon Marcum[6] used a breadboard for testing 100 MHz signals. Richard Klinger[5] was able to drive 1080p TDMS signals with an FPGA routed through a breadboard.
Digital Discovery - a popular logic analyzer by Digilent Inc. - is often used with breadboards (e.g. [6]), and even a breadboard-based version exists[1]. Digital Discovery can sample signals at rates as high as 800 MSa/s, which is very excessive if the digital signals on breadboards are always below 10 MHz.
Are breadboards really limited to low speeds? Or it is possible to use breadboards with high speed digital signals? Does it make sense to sample breadboard signals with such high rates as 800 MSa/s? We will try to answer these questions. In this article we will simulate breadboard behaviour. The next article will be dedicated to real-world tests.

Methods

Solderless breadboard (Fig. 1) consists of terminal strips. Terminals may be used to insert devices (such as IC, pre-made modules, connectors etc.) and connecting wires. We are only going to simulate a single connection (Fig. 2).
Fig. 2. Black box model of the breadboard
Our simple model consists of a device producing a signal (marked In on Fig. 2, and referred to as a transmitter) and another device sampling the signal (marked Out on Fig. 2 and referred to as a receiver). The R1 resistor models the drive strength of the transmitter and is always equal to 100 Ω. The breadboard works as a media connecting these two devices. The specific model of the breadboard will be revealed later.
The methodology is very simple. We will feed a test signal into our model, as if it was produced by the transmitter, and we will observe the signal on the other end, as it is received by the receiver.
We are only interested in digital signals. The digital signals consist of periods of high voltage level (digital 1), and periods of low voltage level (digital 0). Transitions between levels take some time, but in our model we will use instant transitions.
Walt Kester[4], when discussing breadboarding, says: " ... digital circuits present significant challenges because of their extremely fast edge speeds. Even though you may operate a digital circuit at a clock rate of less than 1 MHz, chances are the rise and fall times of the logic transition edges are less than 1 ns. Without controlled connection impedances, these fast edges can produce frequencies well into the GHz range. The resulting ringing due to parasitics can produce false triggering and other effects that will make the digital circuit unreliable or useless".
This means that instant transitions represent the worst case scenario and are likely to produce the worst distortions. If the breadboard works with abrupt edges, then there should not be any problems with signals having smoother edges.
Fig. 3. Test pattern used in simulations. This pattern corresponds to 100 MHz digital signaling.
Our test input pattern is shown on Fig. 3. The timing of the edges is selected to include short and long, as well as low and high pulses. The test pattern is the same as transmitting 10011011 with 100 MHz DDR. We have also simulated the pattern at 2x and 4x speed which corresponds to 200 and 400 MHz respectively.
During the simulation, the test pattern (Fig. 3) is applied to the In terminal (see Fig. 2), then the differential equations are simulated in discrete time using Euler method and the output signal is recorded at the Out terminal.
Fig. 4. The distortion of the signal waveform may produce incorrect measurements of the pulse width. Such measurements may depend on the sampling voltage level.
The pattern observed at the output of the model will be somehow distorted. If we were interested in analog signals, any distortion would be detrimental. However, this is not the case with digital signals. The receiver will digitize the signal - all the voltages above a certain threshold will be classified as digital 1, while all the voltages below the threshold will be classified as digital 0. Therefore, the receiver can tolerate severe distortions in the shape of the signal waveform, as long as the reconstructed transitions between digital levels match the original.
If the distorted signal no longer has fast edges, the reconstructed digital signal will depend on where the receiver threshold is located. As illustrated by Fig. 4, a higher threshold will lead to somewhat shortened high pulses (the length of the 5 ns pulse is measured as 3 ns). At the same time, if the voltage threshold is lower, the same pulse will be lengthened (measured at 7 ns instead of 5 ns). Thus, the distortion of the signal shape may lead to errors in measured pulse widths.
Fig. 5. Measurements of the time between edges of the same polarity (e.g. rising edge to rising edge) may still be accurate even when the signal waveform is distorted.
The distance between edges of the same polarity (from rising edge to the next rising edge, or from falling edge to the next falling edge) is less influenced by distortions. As shown on Fig. 5, even when the signal is considerably distorted, the distance between two rising edges is still measured correctly. The measured distance doesn't depend on where the receiver threshold is located. This is because both rising edges are distorted in a similar way.

The Model

Among the factors limiting breadboard performance, the most often cited is the capacitance of terminal strips[2,4,8] Each breadboard strip consists of five terminals, The strips are located parallel to each other (See Fig. 1). The terminal strips are wide pieces of metal with dielectric placed between them. Thus a parasitic capacitor is formed between neighbouring strips.
While the presence of the parasitic capacitance is certainly a negative factor, the magnitude of it is rather small. When measured, the capacitance between nearest strips is approximately 2.5 pF[3,7]. For comparison, a passive oscilloscope probe may have capacitance of 10 pF or more.
The capacitance is between strips, thus the effect of the capacitance depends on what is connected to nearest strips. In some cases, the effect may be extremely detrimental. For example, Ryan Jensen[2] placed SN74HC14N inverter on the breadboard in such a way that the capacitance between strips formed a feedback path between the inverter's input and output. This have caused ringing.
To remove ambiguity, we will assume that the parasitic capacitance is "connected" to the ground (Fig. 6).
Fig. 6. Capacitive-only model of the breadboard
Such placement may be ensured by connecting neighbouring strips to the ground terminal of the breadboard. For example, if the receiver or transmitter is connected to the strip 9, connecting strips 8 and 10 (see Fig. 1) to the ground ensures that all of the parasitic capacitance is between signal and ground. Note that such arrangement doubles the parasitic capacitance. If the capacitance between strips 8 and 9 is 2.5 pF, and the capacitance between strips 9 and 10 is 2.5 pF, the combined capacitance to the ground will be 2.5 + 2.5 = 5 pF.
If we simulate the capacitive-only model of the breadboard, the result is very encouraging. The distortions are small and well-defined (Fig. 7).
Fig. 7. Simulation of the capacitive model. Black: input waveform. Blue: output waveform with C1 = 3.2 pF. Red: output waveform with C1 = 16 pF.
However, we must consider other factors. When circuits are built on breadboard, the strips are connected with wires. Wires introduce extra inductance (approximately 1 nH per mm), which may interact with strip capacitance. To make our model more realistic, we need to include the wires into the model as well (Fig. 8).
Fig. 8. LC model of the breadboard.
In the new model, we have two capacitors and an inductor. C1 represents the strip capacitance on the transmitter end. C2 represents the strip capacitance on the receiver end. L1 represents the connecting wire. The resulting LC circuit may produce oscillations and destroy the digital signal. An example is shown on Fig. 9 (blue line).
Fig. 9. Example of oscillations caused by the LC circuit. R1 = 100 Ω, C1 = 0, C2 = 0.8 pF, L1 = 200 nH. Black: input waveform. Blue: output waveform without damping resistor showing oscillations at 400 MHz. Red: output waveform with added damping resistor R2 = 500 Ω.
The harmful oscillations may be damped by adding a resistor to the circuit. Usually, the damping resistor would be added in series with R1, reducing the strength of the driver. However, adding series resistor is not convenient on the breadboard. Adding a parallel resistor is much easier. Therefore, in our model, we have placed the damping resistor parallel to the receiver (Fig. 10).
Fig. 10. LC model of the breadboard terminated with damping resistor R2.
When a damping resistor is added, the oscillations quickly fade away (Fig. 9, red line). However, parallel placement of the damping resistor also decreases the amplitude of the signal, which may cause problems for the receiver.
We have modeled three different situations. One is a very short strap of wire connecting two breadboard strips (L1 = 50 nH), next is a 6-inch (15 cm) wire between strips (L1 = 200 nH), and a long 2-foot (60 cm) wire between strips (L1 = 600 nH). For each of these situations we have run the model with and without damping resistor and compared the results.

Results

Fig. 11. Simulation of a short strap connection on breadboard. R1 = 100 Ω, C1 = C2 = 5 pF, L1 = 50 nH. Blue: output waveform without damping resistor. Red: output waveform with added damping resistor R2 = 200 Ω.
The simulation suggests that 100 MHz signal can pass through the short strap connecting two breadboard strips without any significant distortions (Fig. 11). There is some minor ringing which may be easily attenuated with a damping resistor. Even without the damping resistor, the ringing is not a problem because its amplitude is small and frequency is above the frequency of the signal.
Fig. 12. Simulation of a short strap connection on breadboard with the test pattern sped up two times, which corresponds to 200 MHz digital signaling. R1 = 100 Ω, C1 = C2 = 5 pF, L1 = 50 nH. Blue: output waveform without damping resistor. Red: output waveform with added damping resistor R2 = 200 Ω.
As the frequency of the signal increases, the distortions become more severe. At 200 MHz (Fig. 12), the signal is still preserved well and the width of the pulses are nearly unchanged.
Fig. 13. Simulation of a short strap connection on breadboard with the test pattern sped up four times, which corresponds to 400 MHz digital signaling. R1 = 100 Ω, C1 = C2 = 5 pF, L1 = 50 nH. Blue: output waveform without damping resistor. Red: output waveform with added damping resistor R2 = 200 Ω.
At 400 MHz (Fig. 13), distortions are higher, but the signal is still very usable. This suggests that if only short straps of wires are used, signals of up to 400 MHz may be used on the breadboard.
Fig. 14. Simulation of 6-inch (15 cm) wire connection on breadboard. R1 = 100 Ω, C1 = C2 = 5 pF, L1 = 200 nH. Blue: output waveform without damping resistor. Red: output waveform with added damping resistor R2 = 200 Ω.
Using a wire instead of a short strap causes more distortions at 100 MHz (Fig. 14). Increased inductance of the wire increases the amplitude of the ringing and decreases its frequency. Therefore, the ringing interferes with the signal more, but the signal still remains usable even without a damping resistor.
Fig. 15. Simulation of 6-inch (15 cm) wire connection on breadboard with the test pattern sped up two times, which corresponds to 200 MHz digital signaling. R1 = 100 Ω, C1 = C2 = 5 pF, L1 = 200 nH. Blue: output waveform without damping resistor. Red: output waveform with added damping resistor R2 = 200 Ω.
The signal still remains usable at 200 MHz (Fig. 15). However, the amplitude of the ringing is very high. Also, the pulse widths get distorted. For example, the 5 ns pulse in the middle gets disproportionally longer. These problems can be mitigated by the dumping resistor.
Fig. 16. Simulation of 6-inch (15 cm) wire connection on breadboard with the test pattern sped up four times, which corresponds to 400 MHz digital signaling. R1 = 100 Ω, C1 = C2 = 5 pF, L1 = 200 nH. Blue: output waveform without damping resistor. Red: output waveform with added damping resistor R2 = 200 Ω.
The short wire does not work any longer at 400 MHz (Fig. 16). The dumping resistor only makes the situation worse.
Fig. 17. Simulation of 2-foot (60 cm) wire connection on breadboard. R1 = 100 Ω, C1 = C2 = 5 pF, L1 = 600 nH. Blue: output waveform without damping resistor. Red: output waveform with added damping resistor R2 = 350 Ω.
The performance of the long wire is very poor. High wire inductance further amplifies ringing and decreases its frequency. Even at 100 MHz (Fig. 17), ringing is severe and pulse widths are distorted. However, the signal is still usable.
Fig. 18. Simulation of 2-foot (60 cm) wire connection on breadboard with the test pattern sped up two times, which corresponds to 200 MHz digital signaling. R1 = 100 Ω, C1 = C2 = 5 pF, L1 = 600 nH. Blue: output waveform without damping resistor. Red: output waveform with added damping resistor R2 = 350 Ω.
Fig. 19. Simulation of 2-foot (60 cm) wire connection on breadboard with the test pattern sped up four times, which corresponds to 400 MHz digital signaling. R1 = 100 Ω, C1 = C2 = 5 pF, L1 = 600 nH. Blue: output waveform without damping resistor. Red: output waveform with added damping resistor R2 = 350 Ω.
At 200 MHz (Fig. 18) the signal becomes unusable and completely deteriorates at 400 MHz (Fig. 19).

Discussion

The results are rather surprising. The simulations show that breadboards can be used for 100 MHz signals. With some precautions, such as using shorter wires and installing damping resistors, this limit can be increased to 200 MHz.
The model used in simulations is very simple and overlooks many important factors. For example, real life transmitters and receivers may have clamping diodes which may alter the signal if it overshoots power rails. Also, longer wires may pick up electromagnetic noise from nearby wires or other sources.
Therefore, real life breadboard performance may be different from the results obtained with our simple model. Experiments are necessary to confirm the results of the simulations. We have performed such tests and will discuss them in the next post.

References

[1] Franz, Kaitlyn: Logic analyzers, triggers and breadboards
[2] Jensen, Ryan: Breadboard parasitics - misbehaving digital circuits (video)
[3] Jones, Dave: EEVblog #568 - Solderless breadboard capacitance (video)
[4] Kester, Walt: Breadboarding and prototyping circuits
[5] Klinger, Richard: Digilent CMOD A7
[6] Marcum, Brandon: Testing the digital discoverys capabilities
[7] Sanchez-Lopez, Carlos: A 1.7 MHz Chua's circuit using VMs and CF+s
[8] Wikipedia: Breadboard
 
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